Active solid-state devices (e.g. – transistors – solid-state diode – Encapsulated
Reexamination Certificate
2001-11-21
2002-12-31
Clark, Sheila V. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Encapsulated
C257S784000, C438S127000
Reexamination Certificate
active
06501187
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a semiconductor package structure having central leads and a method for packaging the same, and in particular to a semiconductor device that is packaged by glue pouring so as to improve the package efficiency of the semiconductor.
2. Description of the Related Art
FIGS. 1A and 1B
show a conventional semiconductor package structure having central leads in transverse and longitudinal section views, respectively. The semiconductor package structure includes a substrate
10
, a semiconductor device
12
, and glue
14
and
16
. The substrate
10
is formed with a long slot
18
. A plurality of bonding pads
20
formed on the semiconductor device
12
are located in the long slot
18
of the substrate. The bonding pads
20
are electrically connected to the substrate
10
by a plurality of wires
22
. The glue
14
and
16
cover the semiconductor device
12
and the long slot
18
of the substrate
10
, respectively, for protecting the semiconductor device
12
and the plurality of wires
22
.
The method for gluing the glue
14
and
16
in the semiconductor package structure having central leads is performed by glue dispensing or screen printing in order to pour the glue
14
and
16
to cover the semiconductor device
12
and the long slot
18
of the substrate
10
. Therefore, there should be two processes for completing the gluing. Thus, the processes for the semiconductor package having central leads are complicated and the cost of the package is relatively high.
In view of the above-mentioned problems, it is therefore an object of the present inventor to provide a semiconductor package structure having central leads and a method for packaging the same. In the structure and method of the invention, the glue is poured to cover the semiconductor device and the long slot of the substrate by only one process of glue pouring to complete the package of the semiconductor device. Thus, the manufacturing processes are simple and convenient.
SUMMARY OF THE INVENTION
It is therefore a primary object of the invention to provide a semiconductor package structure having central leads and a method for packaging the same. The structure and method are done by glue pouring so as to finish the package of the semiconductor device. Thus, the manufacturing processes are simple and convenient.
It is another object of the invention to provide a semiconductor package structure having central leads, in which a semiconductor device can be efficiently mounted on the substrate when the semiconductor device is packaged by glue pouring.
To achieve the above-mentioned objects, the invention is characterized in that the semiconductor package structure includes:
a substrate having an upper surface, a lower surface, and a long slot penetrating from the upper surface to the lower surface, the lower surface being formed with a plurality of signal output terminals;
a semiconductor device on which are formed with a plurality of bonding pads, the semiconductor device being mounted on the upper surface of the substrate, the plurality of bonding pads on the semiconductor device being exposed via the long slot of the substrate, and the length of the semiconductor device being smaller than that of the long slot of the substrate so that a channel is formed at one side of the long slot when the semiconductor device is mounted on the substrate;
a plurality of wires within the long slot of the substrate for electrically connecting the plurality of bonding pads on the semiconductor device to the plurality of signal output terminals on the substrate; and
glue for sealing the upper surface of the substrate to protect the semiconductor device, the glue being poured into the lower surface of the substrate via the channel formed by the long slot of the substrate, for covering the plurality of wires.
The invention is also characterized in that the method for packaging the semiconductor package structure includes:
providing a substrate, the substrate having an upper surface, a lower surface, and a long slot penetrating from the upper surface to the lower surface, the lower surface being formed with a plurality of signal output terminals;
providing a semiconductor device on which are formed with a plurality of bonding pads, the semiconductor device being mounted on the upper surface of the substrate, the plurality of bonding pads on the semiconductor device being exposed via the long slot of the substrate, and the length of the semiconductor device being smaller than that of the long slot of the substrate so that a channel is formed at one side of the long slot when the semiconductor device is mounted on the substrate;
providing a plurality of wires within the long slot of the substrate for electrically connecting the plurality of bonding pads on the semiconductor device to the plurality of signal output terminals on the substrate; and
providing glue for sealing the upper surface of the substrate to protect the semiconductor device, the glue being poured into the lower surface of the substrate via the channel formed by the long slot on the upper surface of the substrate, for covering the plurality of wires.
Thus, the package of the semiconductor device can be completed by only one process for pouring the glue, thereby facilitating the manufacturing process and lowering the manufacturing cost.
REFERENCES:
patent: 5068712 (1991-11-01), Murakami
patent: 5739585 (1998-04-01), Akram et al.
patent: 6150730 (2000-11-01), Chung et al.
patent: 6175159 (2001-01-01), Sasaki et al.
patent: 6255720 (2001-07-01), Courtenay
patent: 6307755 (2001-10-01), Williams et al.
patent: 6337511 (2002-01-01), Grigg et al.
Chen Allis
Cheng Ching-Shui
Lin Chief
Peng Chen Pin
Yeh Nai Hua
Clark Sheila V.
Pro Techtor International Services
LandOfFree
Semiconductor package structure having central leads and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor package structure having central leads and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor package structure having central leads and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2977105