Semiconductor package structure

Details Semiconductor package structure Semiconductor package structure

1986-07-24

1988-06-14

Pellinen, A. D.

Electricity: electrical systems and devices

Miscellaneous

361388, 174 52FP, H05K 502

Patent

active

047516119

ABSTRACT:
A semiconductor package comprising a pair of flat moldings made from a thermoplastic resin, one of the flat moldings having in the cavity a projection which is welded to a rear side of a tab of lead frame mounting a semiconductor thereon by melt heating, is excellent in heat dissipation and reliability and provides no deformation nor cutting of wires connecting the semiconductor and lead frames.

REFERENCES:
patent: 3930114 (1975-12-01), Hodge
patent: 4369330 (1983-01-01), Pilz
patent: 4393581 (1983-07-01), Cherian
patent: 4486945 (1984-12-01), Aigoo
IBM Tech Disc. Bull, vol. 15, No. 1, Jun. 1972, p. 307, DeBoskey, "Directly Attached Integrated Circuit Lead Frame".
IBM Tech Disc Bull, vol. 9, No. 11, Apr. 1967, p. 1511, Betz et al., "Monolitich Chip Carrier".

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