Semiconductor package including a double-faced semiconductor...

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices

Reexamination Certificate

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C438S106000, C438S107000, C438S110000, C438S111000, C438S112000, C438S123000, C257S668000, C257S666000, C257S787000, C257S784000

Reexamination Certificate

active

06787393

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device. More particularly, the present invention relates to a semiconductor package including a double-faced semiconductor chip having integrated circuitry on both sides thereof and a method of fabricating the semiconductor package.
2. Description of the Related Art
Semiconductor packages are used in a wide range of information technology related devices, such as computers, mobile phones and network equipment, as well as electronic appliances. In particular, in the information industry, a semiconductor package is required to be thin, compact, multi-functional, easy to manufacture by combining at least two semiconductor chips, and able to operate at high speed.
To satisfy these requirements, semiconductor packages called multi-chip packages (MCPs) are fabricated by assembling at least two semiconductor chips. MCPs are made by stacking either two different semiconductor chips or two completed semiconductor packages. However, because two different semiconductor chips or different semiconductor packages are physically bonded together, they are prone to separating from each other or a void may occur at an interface between them. In addition, when combining two different semiconductor chips having bonding pads at the centers of the chips, it is difficult to satisfactorily perform wire bonding thereon. For these reasons, the quality and reliability of MCPs are lowered. Further, because MCPs are made of two different semiconductor chips or different semiconductor packages, there is a limit as to how much the size and volume of an MCP may be reduced.
SUMMARY OF THE INVENTION
In an effort to solve the above-described problems, it is a first feature of an embodiment of the present invention to provide a semiconductor package that is manufactured using a semiconductor chip having integrated circuitry on both sides thereof, thus being compact, thin, multi-functional, and capable of operating at high speed.
It is a second feature of an embodiment of the present invention to provide a method of fabricating such a semiconductor package.
Accordingly, to provide the first feature of an embodiment of the present invention, there is provided a semiconductor package including a double-faced semiconductor chip having a first and a second side, the semiconductor package including a semiconductor chip having integrated circuitry on the first and second sides thereof; a lead-on-chip (LOC)-type substrate having a first and a second side and metal patterns on both sides thereof, which is bonded with the first side of the semiconductor chip with an adhesive; a plurality of first wires, each for connecting a bonding pad on the first side of the semiconductor chip to the metal pattern on the second side of the LOC-type substrate; a plurality of second wires, each for connecting a bonding pad on the second side of the semiconductor chip to the metal pattern on the first side of the LOC-type substrate; a first sealing material for covering a portion of the first side of the exposed semiconductor chip, the plurality of first wires, and a portion of the second side of the LOC-type substrate on the center of an upper portion of the LOC-type substrate; a second sealing material for covering the semiconductor chip, the plurality of second wires, and the first side of the LOC-type substrate on a lower portion of the LOC-type substrate; and solder balls attached to the second side of the LOC-type substrate.
Preferably, the bonding pad is formed at a center of the integrated circuitry formed on the first side of the semiconductor chip and formed at an edge of the integrated circuitry formed on the second side of the semiconductor chip.
The integrated circuitry formed on the first and second sides of the semiconductor chip may have the same function or may have different functions.
Preferably, the LOC-type substrate is formed of polyimide tape. The adhesive that bonds the semiconductor chip with the LOC-type substrate is preferably formed of elastomer. Additionally, the first sealing material may be liquid encapsulant. The second sealing material may be epoxy mold compound. Preferably, each of the metal patterns on the first and second sides of the LOC-type substrate is a bonding finger.
To provide the second feature of an embodiment of the present invention, there is provided a method of fabricating a semiconductor package including a double-faced semiconductor chip having a first and a second side, the method including preparing a semiconductor chip, wherein the semiconductor chip has integrated circuitry on the first and second sides thereof; attaching a lead-on-chip (LOC)-type substrate having a first and a second side, and metal patterns on both sides thereof, to the first side of the semiconductor chip with an adhesive; performing wire bonding in which a bonding pad on the second side of the semiconductor chip is connected to the metal pattern on the first side of the LOC-type substrate, with one of a plurality of second wires; performing a first sealing process in which a second sealing material is applied to the semiconductor chip, the plurality of second wires, and the first side of the LOC-type substrate; performing wire bonding in which a bonding pad on the first side of the semiconductor chip, which is exposed by the LOC-type substrate, is connected to the metal pattern on the second side of the LOC-type substrate, with one of a plurality of first wires; performing a second sealing process in which a first sealing material is applied to the exposed first side of the semiconductor chip, the plurality of first wires, and a portion of the second side of the LOC-type substrate; and attaching solder balls to the second side of the LOC-type substrate.
Preferably, the first sealing process using the second sealing material is carried out using molding equipment. Preferably, the second sealing process using the first sealing material is carried out using a dispenser.
Preferably, after attaching the solder balls, the method further includes performing a marking process on the surface of the second sealing material.
In addition, after performing the marking process, the method further includes performing a singulation process of separating a plurality of LOC-type substrates that are combined with one another in a strip. Preferably, each of the metal patterns on the first and second sides of the LOC-type substrate is a bonding finger.
According to the present invention, it is possible to fabricate a semiconductor package that is compact, thin and multi-functional, and has characteristics of high-density, high-quality and high-reliability.


REFERENCES:
patent: 6118176 (2000-09-01), Tao et al.
patent: 6150708 (2000-11-01), Gardner et al.
patent: 6521980 (2003-02-01), Tandy et al.

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