Semiconductor package having chip selection through...

Details Semiconductor package having chip selection through... Semiconductor package having chip selection through...

2008-10-29

2011-10-04

Lee, Calvin (Department: 2892)

Active solid-state devices (e.g., transistors, solid-state diode

Physical configuration of semiconductor

With electrical contact in hole in semiconductor

C438S667000

Reexamination Certificate

active

08030739

ABSTRACT:
A stacked semiconductor package includes a plurality of stacked semiconductor chips each having a circuit unit, a data pad, and a chip selection pad. The plurality of stacked semiconductor chips also includes a plurality of chip selection through electrodes. The chip selection through electrodes penetrate the chip selection pads and the semiconductor chips, and the chip selection through electrodes receive chip selection signals. The chip selection pad of a semiconductor chip is electrically connected to the chip selection through electrode that receives the chip selection signal for selecting the semiconductor chip. The chip selection pad is electrically insulated from the chip selection through electrodes for receiving the chip selection signal for selecting a different semiconductor chip.

REFERENCES:
patent: 7129567 (2006-10-01), Kirby et al.
patent: 7355267 (2008-04-01), Kirby et al.
patent: 2008-021834 (2008-01-01), None
patent: 10-0364635 (2002-12-01), None

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