Semiconductor package having an LOC structure

Details Semiconductor package having an LOC structure Semiconductor package having an LOC structure

1994-06-02

1995-10-03

Mintel, William

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

On insulating carrier other than a printed circuit board

257674, 257775, 257776, H01L 23482, H01L 23495, H01L 23498

Patent

active

054554527

ABSTRACT:
A semiconductor integrated circuit device and method of making same wherein recessed bus bar regions are provided in an elongated bus bar to accommodate bonding wires which couple the device's chip pads and associated inner leads. Fillets are formed of insulative adhesive material (from the tape used to secure the leads and bus bar to the chip) up about the bus bar region sides to thereby engage the bonding wires to prevent contact between the wires and bus bar.

REFERENCES:
patent: 5357139 (1994-10-01), Yaguchi et al.
IMB Technical Disclosure Bulletin, vol. 34, No. 1, Jun. 1991, "Thin Small Outline Packages", E. J. Dombroski et al., pp. 358-359.

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