Semiconductor package having an exposed die surface

Details Semiconductor package having an exposed die surface Semiconductor package having an exposed die surface

1992-03-18

1994-06-07

Crane, Sara W.

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With window means

257673, 257675, 257692, 257704, 257735, 257737, 257774, 257782, H01L 2348, H01L 2944, H01L 2302, H01L 2940

Patent

active

053192427

ABSTRACT:
A semiconductor package includes a die having a first surface including a plurality of bond pads disposed thereon and a second surface. Inner lead portions of a TAB leadframe are coupled to the bond pads and outer lead portions electrically coupled to the inner lead portions extend therefrom. An encapsulation is disposed on the first surface of the die including the bond pads having the inner lead portions of the TAB leadframe bonded thereto. Encapsulation is also disposed about the sides of the die. The second surface of the die remains exposed. This allows for a relatively thin package having superior thermal dissipation properties.

REFERENCES:
patent: 5001545 (1991-03-01), Kalfus et al.
patent: 5036379 (1991-07-01), Smith et al.
patent: 5070390 (1991-12-01), Shimizu
patent: 5173764 (1992-12-01), Higgins, III
patent: 5177669 (1993-01-01), Juskey et al.
IBM Corp., "Tab Tape Structure for Area Array Tab", IBM Technical Disclosure Bulletin, vol. 32, No. 2, Jul 1989.

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