Semiconductor package

Details Semiconductor package Semiconductor package

2006-11-28

2006-11-28

Smith, Zandra V. (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Test or calibration structure

C257S738000

Reexamination Certificate

active

07141819

ABSTRACT:
A semiconductor package11which has a plurality of connection terminals14to be connected to a board and a plurality of test terminals15, which usually do not need to be connected to the board and are for performance test by the maker, on a joint surface12thereof to the board. Placed in the semiconductor package are a predetermined-pitch area16where the connection terminals14are arranged at predetermined pitches in a lattice and a narrow-pitch area17where the test terminals15are arranged at pitches narrower than the predetermined pitches in a lattice.

REFERENCES:
patent: 5729894 (1998-03-01), Rostoker et al.
patent: 6194782 (2001-02-01), Katchmar
patent: 6815621 (2004-11-01), Park et al.
patent: 5-166901 (1993-07-01), None
patent: 5-259306 (1993-10-01), None
patent: 9-199555 (1997-07-01), None
patent: 2000-068403 (2000-03-01), None
patent: 2001-308152 (2001-11-01), None

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