Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – On insulating carrier other than a printed circuit board
Reexamination Certificate
1998-04-24
2001-10-30
Graybill, David E. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
On insulating carrier other than a printed circuit board
C257S676000, C257S672000, C257S702000, C257S707000, C257S724000, C257S736000, C257S750000, C257S759000, C257S643000
Reexamination Certificate
active
06310389
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor package, and more particularly, to a semiconductor package in which a semiconductor chip and a lead are connected by a conductive layer instead of a wire, and to a method of manufacturing the same.
2. Description of the Related Art
In a semiconductor package, a semiconductor chip is supported by a lead frame, and it is the lead of the lead frame that electrically connects the semiconductor chip to an external circuit.
Referring to
FIG. 1
, in a typical semiconductor package a semiconductor chip of a memory device is mounted on a pad
11
, and inner leads
14
of a lead frame are attached to the pad
11
at the periphery of the semiconductor chip
12
by an adhesive
13
such as an insulating double-sided tape. The semiconductor chip
12
and the inner lead
14
are also bonded by a wire
15
, and the resultant structure is sealed with molding material
16
.
Meanwhile, as a semiconductor chip size becomes smaller, it has been more difficult to connect the semiconductor chip of a small-size to the lead by a wire bonding method because the distance between the inner leads (or ‘pitch’) is correspondingly reduced. Thus, it is difficult to bond the wire precisely to the inner leads of a fine pitch. The wire bonding method cannot be used for inner leads with a fine pitch of 0.2 mm or less, which adversely affects the reliability of the semiconductor package.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a method of manufacturing a semiconductor package wherein a semiconductor chip and an inner lead are connected by a conductive layer rather than by a wire so that an inner lead of a fine pitch and a semiconductor chip may be precisely connected.
To achieve the above object, the present invention provides a method of manufacturing a semiconductor package including the steps of adhering inner leads to a semiconductor chip surface via an insulator, forming an insulating layer on the semiconductor chip and upper surfaces of the inner leads such that bonding pads formed on the semiconductor chip and portions of the inner leads are exposed through an opening, forming a conductive layer in the opening to electrically connect the bonding pads to the inner leads, and forming a semiconductor package by molding the semiconductor chip, the inner leads, the insulating layer, and the conductive layer with a molding material.
The step of forming the insulating layer includes the steps of forming a first insulating layer on the upper surface of the semiconductor chip where the bonding pads are not formed, and forming a second insulating layer on the upper surface of the first insulating layer and on portions of the upper surface of the inner leads except for end portions thereof.
Preferably, the second insulating layer is composed of at least two layers.
It is also preferable that the upper surface of the first insulating layer is level with that of the inner leads.
According to another aspect of the present invention, there is provided a semiconductor package including a semiconductor chip having bonding pads formed thereon, a plurality of inner leads adhered to said semiconductor chip via an insulating adhesive, a plurality of insulating layers coated on the inner leads and on portions of the semiconductor chip where the bonding pads are not formed, and a conductive layer electrically connecting the inner leads to the bonding pads.
REFERENCES:
patent: 5461255 (1995-10-01), Chan et al.
patent: 5656856 (1997-08-01), Kweon
patent: 5696665 (1997-12-01), Nagy
patent: 5791552 (1998-08-01), Werther
patent: 5945188 (1999-08-01), Sei et al.
Graybill David E.
Howrey Simon Arnold & White , LLP
Samsung Aerospace Industries Ltd.
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