Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Ball or nail head type contact – lead – or bond
Reexamination Certificate
1999-08-30
2001-01-23
Clark, Sheila V. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Ball or nail head type contact, lead, or bond
C257S783000, C257S772000
Reexamination Certificate
active
06177731
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a semiconductor package, and more particularly to a ball grid array (BGA) type semiconductor package comprising an organic circuit board and an IC chip mounted on the board by flip chip bonding.
BACKGROUND ART
Conventionally, a BGA type semiconductor package having a bear chip mounted on a board directly by face down technique, has been developed with a reduction in the size of a semiconductor package and an increase in the density thereof. For the bear chip mounting, a flip chip bonding technique has been utilized.
In recent years, furthermore, the market has really demanded a semiconductor package whose size is reduced still more so as to be mounted on a camera integral type VTR, a portable apparatus such as a pocket telephone (portable telephone) and the like. For this reason, a package obtained by making the size of a flip chip semiconductor package almost equal to that of the bear chip, that is, a so-called CSP (chip size/scale package) has rapidly been developed.
With reference to
FIGS. 9 and 10
, the structure of a BGA type semiconductor package in a general CSP according to the prior art will be described below.
FIG. 9
is a sectional view showing a semiconductor package
1
according to the prior art. FIG.
10
(A) is a top view showing an organic circuit board
13
constituting the semiconductor package
1
shown in
FIG. 9
, and FIG.
10
(B) is a bottom view showing the organic circuit board
13
.
The semiconductor package
1
shown in
FIG. 9
is constituted by the organic circuit board
13
and an IC chip
10
mounted on the organic circuit board
13
by flip chip bonding.
A bonding pattern
15
for IC chip connection is formed on a first main surface side
13
a
of a base material
14
of the organic circuit board
13
. The first main surface side
13
a
is covered with a resist film
16
having an opening on each bonding pattern
15
. Furthermore, an external terminal pattern
17
is formed in a grid array on a second main surface side
13
b.
The second main surface side
13
b
is covered with a resist
22
having an opening on each external terminal pattern
17
.
Most of conventional IC chips have been designed on condition that they are mounted by wire bonding. Therefore, an electrode pad
11
is provided in one line (peripheral position) or alternately in two lines along the outer peripheral portion of a main surface
10
a
of the IC chip
10
.
By electrically connecting the electrode pad
11
to the bonding pattern
15
through a protruding electrode
12
, the IC chip
10
is mounted on the organic circuit board
13
with face down by flip chip bonding. Furthermore, a gap between the IC chip
10
and the organic circuit board
13
is integrally sealed with a thermosetting sealing resin
23
by side potting.
A ball electrode
21
is formed on the external terminal pattern
17
. The semiconductor package
1
is mounted on a mother board (not shown) via the ball electrode
21
.
A protruding electrode
12
formed on the electrode pad
11
of the IC chip
10
repeats thermal expansion and contraction even time a heat treatment such as a reflow treatment is carried out during formation and flip chip mounting. The coefficient of thermal expansion of the protruding electrode
12
is different from that of the electrode pad
11
. Therefore, a stress is applied to the electrode pad
11
and an IC chip portion provided therearound by the thermal expansion of the protruding electrode
12
. As a result, a crack is generated between the electrode pad
11
and the IC chip
10
along the circumference of the electrode pad
11
in some cases. There is a possibility that the conduction of the electrode pad
11
and the IC chip
10
might become defective by the crack, thereby causing the IC chip to perform a malfunction. For this reason, there has been a problem in that the reliability of the semiconductor package is deteriorated by the generation of the crack.
The bonding pattern of the conventional organic circuit board
13
is usually arranged in a position corresponding to the position of the electrode pad
11
of the IC chip
10
, that is, in a line along four sides of a quadrangle as shown in FIG.
10
(A). On the other hand, the external terminal pattern
17
of the organic circuit board
13
is arranged in a grid array as shown in FIG.
10
(B).
Furthermore, a through hole
18
is arranged in a line along the outer periphery of the organic circuit board
1
so as to surround the quadrangle obtained by the arrangement of the bonding pattern
15
as shown in FIG.
10
(A). More specifically, the through hole
18
is arranged to surround a region where the external terminal pattern
17
is to be formed on the outside thereof as shown in FIG.
10
(B).
A wiring pattern
19
for connecting each bonding pattern
15
and each through hole
18
one by one is formed on the first main surface side, and a wiring pattern
20
for connecting each external terminal pattern
17
and each through hole
18
one by one is formed on the second main surface side. Each bonding pattern
15
and each external terminal pattern
17
are electrically connected to each other via the through hole
18
.
As shown in FIG.
10
(B), the through hole
18
is provided on the outside of the region where the external terminal pattern
17
is to be formed. For this reason, it is necessary to provide a wiring
20
a
connected to another external connecting pattern between adjacent external terminal patterns
17
a
and
17
b,
for example. If the number of the external connecting patterns
17
is increased, the number of wirings is increased. If the number of the wirings between the external connecting patterns is increased, a space between the adjacent external connecting patterns should be enlarged. In the conventional semiconductor package, therefore, it has been hard to reduce the area of the organic circuit board to have a small size without decreasing the number of the external connecting patterns.
Accordingly, the present invention has been made in consideration of the above-mentioned problems and it is an object of the present invention to provide a BGA type flip chip bonded semiconductor package which is suitable for mounting on a small-sized portable apparatus or the like, has a small size and excellent reliability and is inexpensive.
DISCLOSURE OF THE INVENTION
The present invention provides a semiconductor package comprising an organic circuit board in which a bonding pattern for IC chip connection is formed on a first main surface side, an external terminal pattern is formed in a grid array on a second main surface side and a through hole for electrically connecting the bonding pattern and a ball electrode terminal is formed, and an IC chip which has an electrode pad formed on a main surface and is mounted by flip chip bonding on the organic circuit board through a protruding electrode formed on the electrode pad, a gap between the organic circuit board and the IC chip being filled with a sealing resin, and a ball electrode being formed on the external terminal pattern, wherein the main surface of the IC chip is covered with an organic resin film having an opening on the electrode pad, and the protruding electrode is formed of an eutectic solder having a lower melting temperature than a heat resisting temperature of the organic resin film.
According to the semiconductor package of the present invention, thus, the main surface provided around the electrode pad of the IC chip is covered with the organic resin film. Therefore, the stress applied to the IC chip portion around the electrode pad by the thermal expansion of the protruding electrode can be relieved. As a result, a crack can be prevented from being generated between the electrode pad and the IC chip. Accordingly, the reliability of the semiconductor package can be enhanced.
However, the organic resin film has a low heat resistance. For this reason, with the material such as a high melting point solder to be used in a conventional protruding electrode, the organic resin film is molten when
Ishida Yoshihiro
Ishiwata Shuichi
Miyazaki Taichi
Ohara Tsutomu
Omura Atsushi
Citizen Watch Co. Ltd.
Clark Sheila V.
Kanesaka & Takeuchi
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