Semiconductor package

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For plural devices

Patent

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Details

257723, 257924, 438190, H01L 2334, H01L 2302

Patent

active

060911441

ABSTRACT:
A semiconductor package in which a semiconductor chip 16 is formed above a die pad 12 interposing a capacitor 22 therebetween, or the semiconductor chip 16 and the capacitor 22 in a vortex-shaped form are respectively formed on both faces of the die pad 12, or the condensers 22 are formed on both faces of the die pad 12 and the semiconductor chip 16 is formed on one of the condensers 22, and the die pad 12, the semiconductor chip 16 and the condensers 22 are sealed by resin by which adverse effect of noise is reduced, wherein the shape of the capacitor may be in a vortex-shaped form or opposed faces of metal layers may be roughened.

REFERENCES:
patent: 5095402 (1992-03-01), Hernandez et al.
patent: 5200364 (1993-04-01), Loh
patent: 5234857 (1993-08-01), Kim et al.
patent: 5428245 (1995-06-01), Lin et al.
patent: 5600175 (1997-02-01), Orthmann

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