Metal treatment – Barrier layer stock material – p-n type – With non-semiconductive coating thereon
Reexamination Certificate
2006-03-28
2006-03-28
Fourson, George (Department: 2823)
Metal treatment
Barrier layer stock material, p-n type
With non-semiconductive coating thereon
C438S459000
Reexamination Certificate
active
07018484
ABSTRACT:
A method of fabricating a semiconductor-on-insulator semiconductor wafer is described that includes providing first and second silicon substrates. A first thin layer of silicon dioxide is formed on one substrate and a second thicker layer of silicon dioxide is formed on the other substrate. A layer of rare earth is deposited, generally by evaporation, on the thicker layer of silicon dioxide. The rare earth layer is placed on the thin silicon dioxide layer and the structure is bonded by annealing to form a layer of rare earth silicon dioxide. A portion of the one substrate is removed to form a thin crystalline active layer on preferably the rare earth silicon dioxide layer, but potentially on the thicker silicon dioxide layer.
REFERENCES:
patent: 6114188 (2000-09-01), Oliver et al.
patent: 6645830 (2003-11-01), Shimoda et al.
patent: 6818530 (2004-11-01), Shimoda et al.
patent: 2003/0224582 (2003-12-01), Shimoda et al.
patent: 2005/0095815 (2005-05-01), Bojarczuk et al.
Fourson George
Goltry Michael W.
Parsons Robert A.
Parsons & Goltry
Translucent Inc.
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