Static information storage and retrieval – Systems using particular element – Semiconductive
Patent
1992-04-10
1993-03-30
Fears, Terrell W.
Static information storage and retrieval
Systems using particular element
Semiconductive
365 51, G11C 1140
Patent
active
051989964
ABSTRACT:
A semiconductor non-volatile memory device, has plural data storage parts which are connected in series between the source region and drain region. In such a constitution, when integrating the semiconductors, the relative area occupied by the selection gate, separation gate, source region and drain region of the area of the data storage parts may be drastically reduced, and the degree of integration of the semiconductor non-volatile memory device can be dramatically enhanced. The device also allows for setting the semiconductor substrate in a depletion state by sequentially varying the gate potential of the plural data storage parts and transferring the electric charges sequentially. By this transferring of electric charges, data write errors may be prevented.
REFERENCES:
patent: 3613055 (1971-10-01), Varadi
patent: 3728696 (1973-04-01), Pockinghorn
patent: 3893152 (1975-07-01), Lin
patent: 4142176 (1979-02-01), Dozier
patent: 4233526 (1980-11-01), Kurogi et al.
patent: 4380804 (1983-04-01), Lockwood et al.
patent: 4476478 (1984-10-01), Noguchi et al.
patent: 4501007 (1985-02-01), Jensen
patent: 4613956 (1986-09-01), Paterson et al.
patent: 4652339 (1987-03-01), Bluzer et al.
patent: 4803706 (1989-02-01), Murayama et al.
patent: 4903098 (1990-02-01), Smit et al.
"Nitride-Oxide Layer Proofs Memory Against Data Loss", 5 Jul. 1971, Electronics, pp. 53-56.
IBM Technical Disclosure Bulletin, vol. 27, No. 6, Nov. 1984, New York, U.S. pp. 3302-3307; Adler, E.: `Densely Arrayed EEPROM Having Low-Voltage Tunnel Write` * p. 3302, Line 1-p. 3304, line 30; FIGS. 1, 2, 3, 4*.
1986 Symposium on VLSI Technology Digest of Technical Papers, San Diego, R. Stewart et al., A High Density EPROM Cell and Array; pp. 89-90 *the whole document*.
1988 Symposium on VLSI Technology Digest of Technical Papers, IEEE, San Diego, R. Shirota et al., A New NAND Cell for Ultra High Density 5V-Only EEPROMS, pp. 33-34 * p. 33, left column, line 50-p. 33, right column, line 9; FIG. 1*.
Electronics & Power, vol. 19, No. 9, 17 May 1973, Hitchen GB, pp. 188-192; J. D. E. Beynon: `Charge Coupled Devices` * p. 188, right column, line 37-p. 189, left column, line 39; FIGS. 4A-4C*.
Kojima Makoto
Takata Takashi
Fears Terrell W.
Matsushita Electronics Corporation
LandOfFree
Semiconductor non-volatile memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor non-volatile memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor non-volatile memory device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1286344