Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate
2001-12-04
2003-12-30
Clark, Sheila V. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Multiple housings
C257S685000, C257S777000
Reexamination Certificate
active
06670701
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor module and an electronic component, and specifically, to a semiconductor module that is small and capable of mounting semiconductor chips in high density and that can be mounted in high density onto another electronic component, and an electronic component having such semiconductor module mounted thereon.
2. Description of the Background Art
FIG. 31
is a front view showing an example of a memory module structure of a conventional semiconductor module, and
FIG. 32
is a plan view thereof. On a surface side and an underside of a mounting substrate
101
, semiconductor packages
104
and
124
are mounted. This mounting substrate
101
is connected to another electronic component by an external lead
107
connected to an interconnection pattern (not shown) provided on mounting substrate
101
. Semiconductor package
104
has a semiconductor chip sealed by resin, and is connected to an interconnection pattern on mounting substrate
101
via external leads
103
and
123
. Another example of an electronic component having one layer of memory module
110
mounted on each side is a mother substrate
150
as shown in FIG.
33
. In
FIG. 33
, external leads
107
for memory modules
110
a
,
110
b
, and
110
c
are connected to an interconnection pattern (not shown) of mother substrate
150
. Thus, high packaging density could be achieved by disposing semiconductor packages
104
and
124
in two layers on mounting substrate
101
.
Higher levels of smaller scale, higher density memory modules to be mounted on a portable telephone, portable terminal equipment or the like are constantly required along with the advances of the information technology oriented society. It has become difficult to satisfy the demand for such smaller scale, higher density memory modules merely by improving upon the memory module having a structure shown in
FIGS. 31
to
33
. Thus, in order to achieve higher density in the memory capacity of a memory module, for instance, a memory module as shown in
FIG. 34
has been disclosed (Japanese Patent Laying-Open No. 4-276649). According to this memory module
110
, three semiconductor packages
104
a
,
104
b
, and
104
c
are mounted on a single side so that the memory capacity per unit area of memory module
110
can be made higher in density than that of the memory module shown in
FIGS. 31
to
33
.
Until now, however, the approach of high density packaging involved achieving high density in the memory capacity only within memory module
110
so that it lacked the viewpoint of effecting high density packaging with respect to disposition of memory module
110
to mother substrate
150
. In other words, it was never attempted to reduce the area per memory module on mother substrate
150
. For improvement, it is desirable to dispose a memory module on a mother substrate in an area-efficient manner so as to allow mounting of one extra memory module in addition to what was conventionally provided, for instance. Such efficient disposition, when implemented, would greatly contribute to achieving higher density in the memory capacity. As shown in
FIG. 33
, in a conventional memory module having semiconductor packages mounted in multiple layers, memory module
110
is mounted on mother substrate
150
using external lead
107
of the mounting substrate.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a semiconductor module that achieves higher density in the semiconductor module itself on which semiconductor packages such as memory modules are provided in multiple layers and that can be mounted in high density on another electronic component such as a mother substrate, and an electronic component having such semiconductor module mounted thereon.
In addition, another object of the present invention is to provide a semiconductor module which has the characteristics of the above-described semiconductor module as well as high stability in that it is not affected by slight variation in manufacturing conditions, which allows easy reworking of defect that occurs during the production, and which can maintain high yield even during high efficiency production, and an electronic component having such semiconductor module mounted thereon.
The semiconductor module according to the present invention includes a mounting substrate having on an underside a solder ball for connecting to interconnection of another electronic component, and a plurality of semiconductor packages mounted in multiple layers on a surface side of the mounting substrate and connected to an electrode provided on the mounting substrate.
The present semiconductor module is connected to another electronic component by a solder ball provided on the underside. Thus, when mounted on another electronic component, a mother substrate, for instance, the semiconductor module only occupies a small area. Consequently, a greater number of semiconductor modules can be mounted on the mother substrate for the same area so that such arrangement greatly contributes to achieving a smaller scale, higher density packaging for a portable telephone, portable terminal equipment, or the like. The above-described semiconductor packages can be stacked with one's top side being contact with another's underside, or with one top side distanced from one underside. When the semiconductor packages are stacked with one's top side being contact with another's underside, the height of the above-described semiconductor module can be reduced so that the volume of the semiconductor module can be further reduced. As a result, further improvement in smaller scale and higher density packaging can be achieved. In the above as well as in the following description, the term “connection” signifies both an electrical connection and a mechanical connection for providing support.
In the semiconductor module according to the present invention, for instance, in the plurality of the semiconductor packages, lead nominal dimensions, which are the distances between electrodes to which lead terminals of the semiconductor packages are connected, and package heights, which are the heights between the electrodes and a semiconductor chip sealed by resin, all differ respectively.
According to this arrangement, multilayer packaging on a mounting substrate can be achieved using external leads and without using other members for mounting. Thus, the number of components can be reduced so that the manufacturing cost can be reduced.
In the semiconductor module according to the present invention, for instance, a spacer substrate is provided that has a connecting portion and an interconnection pattern and that is disposed outside of the semiconductor packages when seen in a plane, and in a semiconductor package, a lead terminal of the semiconductor package can be connected to the connecting portion of the spacer substrate.
According to this arrangement, semiconductor packages of the same dimension can be systematically disposed in multiple layers and supported without varying the package heights and the lead nominal dimensions of external leads extending from a plurality of semiconductor packages to make the heights and the dimensions differ. Thus, the need to produce many kinds of semiconductor packages having external leads of different shapes can be eliminated. As a result, it becomes possible to produce the semiconductor modules efficiently and with high yield. Moreover, the length of an external lead extending from the semiconductor package can be made shorter than the above-described semiconductor package so that strong support for the semiconductor package can be provided. Here, the connecting portion forms a terminal portion of the interconnection pattern.
In the semiconductor module according to the present invention, for instance, sub-substrates, each having an interconnection pattern and an external lead and having a smaller planar size than the mounting substrate, are provided in multiple layers on the mounting substrate
Kasatani Yasushi
Maeda Hajime
Matsuura Tetsuya
Michii Kazunari
Clark Sheila V.
Leydig , Voit & Mayer, Ltd.
Mitsubishi Denki & Kabushiki Kaisha
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