Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For plural devices
Reexamination Certificate
2002-09-13
2004-04-27
Clark, Sheila V. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
For plural devices
C257S686000, C257S724000
Reexamination Certificate
active
06727581
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor module wherein a semiconductor chip is mounted on a module substrate.
2. Description of the Background
A semiconductor memory device is, in many cases, utilized in a personal computer, a workstation or the like. In addition, in recent years the speed, degree of compactness and number of functions of personal computers have increased and, therefore, semiconductor memory devices have been required to further increase their memory capacity. In addition, the market has expanded so that a large number of low-cost memory devices are used. Therefore, further increase in the capacity of, and further reduction in costs of, semiconductor memory devices have become required.
The number of DRAMs (Dynamic Random Access Memory), from among the above described semiconductor memory devices utilized in personal computers or the like has increased because it is advantageous from the point of view of cost per bit unit. Cost per bit unit can be reduced by increasing the diameter of wafers even in the case that the capacity is increased and, therefore, DRAMs are frequently utilized.
In a DRAM, however, cost of development, cost for high level institutions and the like have greatly increased together with the increase in the testing period of time and test costs accompanying the increase in capacity as well as the enhancement of microscopic processing technology so that whether or not those costs can be reduced has become a problem.
The bit configuration for the input to or output from a DRAM is conventionally 4 bits, 8 bits or 16 bits and, therefore, the variety in types of bit numbers is small so that one module is made up of a plurality of DRAMs for general utilization. Thus, a semiconductor memory device such as a DRAM is, in many cases, utilized in a module condition.
FIGS. 9 and 10
show an example of a conventional semiconductor module (memory module). The conventional semiconductor module has a structure, wherein single chips
117
, in which bare chips
101
, mounting islands
104
, bonding wires
105
and lead frames
110
are molded into mold resin
108
, are mounted on a semiconductor module substrate
102
, such as of an SOP (Small Outline Package) or a TSOP (Thin Small Outline Package) corresponding to a surface mounting technology wherein parts can be mounted on both sides of a printed circuit board.
In addition, development has progressed of a memory package having a basic tendency toward miniaturization and thinning together with enhancement of performance and of functions of a memory chip. Then, though an insertion system has been adopted for a memory package, in recent years the forms of packages have greatly changed such that a surface mounting system has started to be adopted.
At present, the surface mounting system has become the main trend in place of the insertion system and further miniaturization and lightening of a package are strongly required. Up to the present, simplification of design and increase in reliability, as well as reduction in cost, have been achieved by utilizing a semiconductor module.
In addition, in a conventional manufacturing process of a semiconductor module, in the case that a defective chip is discovered in a module test after the manufacture of a semiconductor module, testing and replacement of such a defective chip are carried out until such defect has been removed.
As described above, there is a problem with the conventional semiconductor module wherein a plurality of single memory chip ICs (Integration Circuits) in the form of packaged single chips
117
is mounted to semiconductor module substrate
102
, as shown in
FIG. 9
, and, therefore, the mounting area of the single memory chip ICs becomes large.
In addition, there is a problem wherein a great amount of time and effort are required for the replacement of a memory chip that has been detected as being defective according to the conventional manufacturing process of a semiconductor module. Furthermore, though there is a memory module in the form of a COB (Chip On Board) as a semiconductor module with which high density mounting can easily be carried out, there is a problem wherein a bare chip that has been detected as being defective cannot be repaired after bare chips have been sealed into mold resin according to the conventional module in the form of a COB.
SUMMARY OF THE INVENTION
A first object of the present invention is to provide a semiconductor module wherein, bare chips other than a bare chip that has become defective from among a plurality of bare chips can be effectively utilized by newly mounting a good chip even in the case that the chip defect is detected after the chips have been molded into mold resin. In addition, a second object is to achieve high concentration mounting in a semiconductor module by integrally molding a plurality of bare chips provided on a semiconductor module substrate.
A semiconductor module of the present invention is provided with a semiconductor module substrate, a plurality of bare chips mounted on the main surface of the semiconductor module substrate, and a mold resin for covering the plurality of bare chips together with the main surface of the semiconductor module substrate. In addition, the semiconductor module of the present invention includes a plurality of repair chip mounting regions provided outside of the mold resin, which are regions wherein repair chips having input/output terminals that can be utilized in place of the plurality of bare chips, respectively, can be mounted. In addition, the semiconductor module of the present invention includes a plurality of electrical wires that is connected to the input/output terminals of the mounted repair chip(s) for inputting or outputting electrical signals that have been inputted to, or outputted from, the bare chip(s) that has (have) been detected as being defective via these input/output terminals to the mounted repair chip(s) in the case that any of the plurality of bare chips has been detected as being defective and (a) repair chip(s) has (have) been mounted on any of the plurality of repair chip mounting regions.
According to the above described configuration, a repair chip can be mounted to any of the plurality of repair chip mounting regions in place of a bare chip that has become defective from among the plurality of bare chips, thereby the semiconductor module can be repaired after the bare chips are sealed in the resin. Therefore, bare chips other than the bare chip that has become defective from among the plurality of bare chips can be effectively utilized.
In the semiconductor module of the present embodiment, the plurality of bare chips, respectively, may be formed so that it is possible to stop the functions inside of the plurality of bare chips, respectively, by a predetermined unit. In addition, the module of the present invention may be formed so that the electrical signals that have been outputted from the bare chip detected as being defective are outputted from a repair chip and the electrical signals that have been inputted to the bare chip are inputted to the repair chip in the case that the repair chip has been mounted on the semiconductor module substrate and the function of the bare chip has been stopped by the predetermined unit.
According to the above described configuration, the function of a bare chip can be stopped by a predetermined unit and, therefore, conflicts of signals due to unnecessary signal input/output can be prevented and power consumption waste can be reduced.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.
REFERENCES:
patent: 4721995 (1988-01-01), Tanizawa
patent: 6002178 (1999-12-01), Lin
patent: 08-153846 (1996-06-01), None
patent: 10-256474 (1998-09-01), None
Abe Ryo
Miyamoto Takayuki
Clark Sheila V.
Renesas Technology Corp.
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