Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For plural devices
Reexamination Certificate
2000-06-26
2002-03-05
Wille, Douglas A. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
For plural devices
C257S690000
Reexamination Certificate
active
06353258
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to a semiconductor module having a plurality of structural units each of which has a plurality of power semiconductor elements such as chips of insulated gate transistors and diode chips, etc.
As is explained in “Journal of Electronic Engineering”, (August, 1991) pp. 17 to 71, for example, an insulated gate transistor is an electric power switching element having the high-speed and high input impedance characteristics of a MOSFET and the low saturation voltage characteristics of a bipolar transistor. The insulated gate transistor has the following features.
(1) Voltage driving type
(2) A high-speed operation
The insulated gate transistor is easy to use and provides a high performance, thus the insulated gate transistor has been used as an electric power switching element.
On the other hand, the insulated gate transistor has the following problems:
(a) It is difficult to make a device able to withstand high voltage; and
(b) Small electric current capacity per unit area of the chip.
When switching a large amount of electric power, series and parallel connections of chips are indispensable to solve the problems mentioned above. Therefore, modules of insulated gate transistors and multiplex connection of modules have been employed. When the modules of the insulated gate transistors are prepared, they must be connected in series.
One unit circuit is formed in a module. The number of units is increased or decreased in a module, according to demands. Two parallel connections of the unit circuits in one module are generally employed, which is disclosed in Japanese Patent Laid-open Publication No. 2-178969, for example. In this publication, each unit of two parallel connections is arranged in line symmetry in the module. However, such an arrangement is difficult to adapt to a multiplex parallel connection, such as three or four parallel connections.
As mentioned above, a single insulated gate transistor module has sometimes an insufficient withstanding capacity to voltage and current. In this case, multiplex connections of the modules are necessary, as well as multiplex connections of the units in one module. In order to solve the above problems, a structure has been desired in which connecting terminals are concentrated on the upper surface of the module. In addition, it is required that the gate wiring be resistive to the influence of the main circuit wiring among modules. An influence on the gate wiring by the electric current flowing in the main circuit is greatly affected by arrangement of the gate terminal of the module. For example, a structure for connecting terminals arranged on the upper surface is disclosed in Japanese Patent Laid-open Publication No. 57-15453. In this case, a base is arranged at the end of the module, considering a parallel connection of the modules. In this arrangement, the base is used instead of a gate because the arrangement is related to a transistor module. When the modules of this structure are connected in series, the wiring of the main circuit is formed above the base terminal. Thus, the base circuit is influenced by the current flowing in the main circuit, which is not convenient for the device.
As was described in the above-mentioned publication, consideration has not been paid to a unit in the module having a structure which can provide a multiplex connection of the units even if the number of structural units exceeds two or a structure which can avoid the problems stemming from multiplex connection of the module.
SUMMARY OF THE INVENTION
An object of this invention is to provide a power electric semiconductor module, which mounts power semiconductor elements such as insulated gate transistors, diodes, etc. and which is capable of expanding the capacity of a module in accordance with demands.
Another object of this invention is to provide a power electric semiconductor module with high reliability, which mounts power semiconductor elements, such as insulated gate transistors, diodes, etc.
According to this invention, a multiplex connection in the module is realized by a method in which a plurality of structural units having the same configuration are arranged in the same direction on a substrate, each of the structural units comprising power semiconductor elements and wiring metallic foil, the elements and foils being arranged asymmetrically on the substrate, wherein an electrode terminal is arranged with certain spacing with adjoining electrode terminals above each of the structural units, and these terminals are connected with linkage terminals.
According to an example of this invention, all of the main terminals and auxiliary terminals are arranged on the top surface of the module to form a multiplex connection in a module. It is desirable that auxiliary terminals are arranged between the main terminals. According to another example of this invention, a tin and antimony solder is used for bonding the power semiconductor elements so as to increase the reliability of the module. At the same time, a tin and lead solder is used for bonding the members for supporting the power semiconductor elements in the module to secure the reliability of the module.
According to still another example of the present invention, the reliability of the module is increased by providing an air layer in the module to avoid excessive stress due to expansion and shrinkage of silicone gel.
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Electronic Packaging and Interconnect Handbook C.A. Harper Ed McGraw-Hill, pp. 5.5, 6.18 Date: 1991.
Patent Abstracts of Japan, Pub. No. 03-097257, published Mar. 23, 1991, entitled “Large Power Semiconductor Device”.
Patent Abstract of Japan, Pub. No. 03-292764, published Dec. 24, 1991, entitled “Transistor Module & Inverter Device”.
Patent Abstracts of Japan, Pub. No. 61-185954, published Aug. 19, 1986, entitled “Resin-sealed Power Semiconductor Device”.
Patent Abstracts of Japan, Pub. No. 04-350957, published Dec. 04, 1992, entitled “Power Semiconductor Module”.
Patent Abstracts of Japan, Pub. No. 05-013920, published Jan. 22, 1993, entitled “Manufacture of Ceramic Circuit Substrate”.
Inoue Hirokazu
Kamita Yukio
Kimura Shin
Kobayashi Isao
Kurihara Yasutoshi
Antonelli Terry Stout & Kraus LLP
Hitachi , Ltd.
Wille Douglas A.
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