Abrading – Abrading process – Glass or stone abrading
Reexamination Certificate
1998-10-28
2001-05-22
Morgan, Eileen P. (Department: 3817)
Abrading
Abrading process
Glass or stone abrading
C451S054000, C451S070000, C438S692000, C216S088000, C216S089000
Reexamination Certificate
active
06234873
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor mirror-polished surface wafer whose front and rear surfaces can be distinguished. In particular, the present invention relates to a semiconductor mirror-polished surface wafer whose rear surface is acid-etched and a method for manufacturing the semiconductor mirror-polished surface wafers.
2. Description of the Prior Art
In an ordinary device manufacturing process, the rear surface of a semiconductor mirror-polished surface wafer is always sucked and held by a sucker and circuits are formed on the front surface. When, only the front surface of the semiconductor mirror-polished surface wafer is mirror-polished and the roughness of the rear surface remains unpolished, due to the suction force, the unevenness of the rear surface could transfer to the front surface. This will bring about a harmful effect to the device manufacturing process and lessen the yield of the device manufacturing process. Therefore, the both front and rear surfaces of a wafer are simultaneously or separately polished into mirror surfaces to avoid a decrease in the yield.
However, either surface of the two-sided mirror-polished surface wafer can not be distinguished from each other. In particular, in a manufacturing device provided with a sensor for detecting the front side and the rear side, an “error” sign appears if the sensor can not detect the rear side. Therefore, a semiconductor mirror-polished surface wafer, whose rear surface is nearly mirror-like and capable of being detected by the sensor, is required.
The method for manufacturing such a semiconductor mirror-polished surface wafer has been disclosed in, for example, Japanese Patent Laid-open No. 6-349795. In Japannese Patent Laid-open No. 6-349795, semiconductor mirror-polished surface wafers are alkali-etched, and then their rear surfaces are polished. The front surfaces are polished subsequent to the polishing of the rear surfaces. In the process of polishing the rear surfaces, the roughness of the rear surfaces brought about in the foregoing etching process is polished with a trivial amount being remained so as to enable the identification of the front surface and the rear surface. To maintain the flatness during manufacturing processes, the etching processes employed are limited to alkali etching processes.
However, problems other than flatness, induced during alkali etching processes, still exist; for example, particulate residue, dust and metal contamination.
Furthermore, in order to remove pits or control the glossiness of the wafers, the rear surfaces have to be polished. The time spent in polishing the rear surfaces would lessen the productivity.
SUMMARY OF THE INVENTION
In view of the above-described defects, an object of the present invention is to provide a semiconductor mirror-polished surface wafer whose rear surface is nearly mirror-like so as to enable the distinction of the front surface and the rear surface of the wafer. This invention is also intended to provide a highly productive method for manufacturing semiconductor mirror-polished surface wafers, which method can avoid particulate residue or metal contamination.
According to this invention, at least the rear surface of the wafer is spin-etched by an acid-etchant liquid to reach a glossiness value of 130-300%, and the front surface is made to a mirror surface (glossiness value greater than 300%). It is also satisfactory to spin-etch both front and rear surfaces of the wafer by an acid-etching liquid to reach a glossiness value of 130-300% and then to mirror-polish only the front surface of the wafer. As described hereinafter, both the flatness and the glossiness of the etched surface of the wafer treated by the acid spin-etching process are enhanced compared with conventional alkali-etching process or immersion type acid-etching process. Therefore, the load in the succeeding finishing process can be reduced and the productivity is accordingly enhanced.
REFERENCES:
patent: 4276114 (1981-06-01), Takano et al.
patent: 5285597 (1994-02-01), Hinzen
patent: 5329733 (1994-07-01), Steere, Jr.
patent: 5351446 (1994-10-01), Langsdorf
patent: 5800725 (1998-09-01), Kato et al.
patent: 5976983 (1999-11-01), Miyazaki et al.
patent: 6-349795 (1994-12-01), None
Imura Kouichi
Ishii Akihiro
Yamamoto Hiroaki
Komatsu Electronic Metals Co. Ltd.
Morgan Eileen P.
Oliff & Berridg,e PLC
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