Semiconductor method of manufacture

Details Semiconductor method of manufacture Semiconductor method of manufacture

2000-05-12

2002-04-09

Nelms, David (Department: 2818)

Semiconductor device manufacturing: process

Semiconductor substrate dicing

Having specified scribe region structure

C438S457000, C438S458000

Reexamination Certificate

active

06368943

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device, where the to a semiconductor device diced along a scribe line area between a plurality of semiconductor chip areas.
2. Description of the Related Art
A semiconductor device such as an IC or a LSI is manufactured using a semiconductor wafer obtained by slicing a semiconductor single crystal ingot as the starting material. After forming a plurality of semiconductor chip areas on a semiconductor wafer by effecting various processes for the semiconductor wafer, dicing is performed along the scribe line area formed between semiconductor chip areas to divide the wafer into individual semiconductor chips which may be used assemble the semiconductor device.
A dicing blade is used to divide the semiconductor wafer into semiconductor chips. This diamond blade is obtained by adhering diamond particles to blade surface, which becomes the cutting portion of a round grindstone this blade scores through such adhesive material as a nickel plating layer. The diamond particles are pressed against the semiconductor wafer while the gindstone revolves at speeds as high as ten thousands rpm to cut along the scribe line area. Since heat is generated during the dicing operation, the operation is performed while cooling by pouring water over the semiconductor wafer.
FIG. 5
is a plan view for explaining conventional dicing, and
FIG. 6
is a cross-sectional view taken on line A—A in FIG.
5
.
In
FIGS. 5 and 6
, numeral
1
designates a semiconductor wafer;
2
, a semiconductor chip area formed on the semiconductor wafer
1
; and
3
, an insulating protective film consisting of oxide (SiO
2
) for protecting the surface of each semiconductor chip area
2
and the like, and this insulating protective film
3
is actually formed to have multilayer film structure. Numeral
4
designates a pad electrode consisting of Al and the like formed at a desired position on each semiconductor chip area
2
;
5
, a scribe line area formed between each of the semiconductor chip areas
2
;
6
, a scribe center;
7
, a scribe edge; and
8
, an over-coated film consisting of a nitride film (SiN) covering the pad electrode
4
and the scribe line area
5
, and the like. In this respect, numeral
13
designates a pattern for process monitor called “Scribe TEG (Test Element Group)”, which may or may not be formed.
The dicing is started by positioning a dicing blade in the scribe center
6
of the scribe line area
5
in order to press it against the semiconductor wafer
1
in
FIGS. 5 and 6
. The dicing, is performed with the semiconductor wafer
1
fixed by an appropriate supporting jig. After dicing in one direction (for example, the X direction) of the semiconductor wafer
1
is completed, dicing in another direction (for example, the Y direction) is performed. After dicing in the X and Y directions is completed, the semiconductor wafer
1
is divided into individual semiconductor chips by releasing the supporting jig. Numeral
16
designates an example of an actual relative width for cutting using the dicing blade.
In a conventional semiconductor device, when a semiconductor wafer is divided by dicing, a problem of indeterminate rupture, so-called chipping, occurs along the edge of the cutting line of the semiconductor wafer in contact with the dicing blade.
This chipping occurs and causes a chipping portion indicated by numeral
9
in FIG.
5
. When the chipping portion
9
enters the semiconductor chip area
2
from the scribe line area
5
, there is a possibility that the semiconductor chip divided by dicing does not properly operate, becoming a defective element in the worst case.
One countermeasure to prevents chipping from occurring by removing the over-coated film in the scribe line area to directly dice the surface of the semiconductor wafer. According to this proposal, however, since the scribe line area is exposed, when wire bonding is utilized for the semiconductor chip after completion of the dicing, there is a drawback that the wire comes into contact with a part of the scribe line area to cause a short-circuit, or other problems.
Also, recently, there has been generally arranged a pattern
13
for process monitoring called a “Scribe TEG (Test Element Group)” within the scribe line area for the purpose of shrinking the chip. But since this TEG is formed by stacking an insulating film and a conductive film, it causes the dicing blade to become clogged during dicing, and further causes chipping to easily occur. To avoid this, one might enlarge the width of the scribe line area, but this it is not desirable because it runs counter to the chip shrinkage.
SUMMARY OF THE INVENTION
The present invention solres such problems, and its object is to prevent chipping from entering the semiconductor chip area when the semiconductor wafer is diced along the scribe line area provided between each of the semiconductor chip areas.
A method of manufacturing a semiconductor device according to the present invention is provided having the steps of covering the surface of a semiconductor wafer with a first insulating film on the side of an element forming area where a plurality of chip areas have been formed, forming a pad electrode on the chip area, removing the second insulating film on the pad electrode after the surface of the semiconductor wafer containing the pad electrode is covered with a second insulating film, and forming a chipping preventing portion on a portion of the scribe line area on the side of the semiconductor element area.
Further developments include using the same material for the first and second insulating films, forming a groove in an insulating film within the scribe line area, forming the chipping preventing portion by removing the second insulating film at a predetermined position simultaneously with a process of removing the second insulating film on the pad electrode, forming the chipping preventing portion by a protrusion of a third insulating film swollen on the first or second insulating film by interposition of a conductive film, or forming the protrusion by providing the conductive film having the same material as the pad electrode at a predetermined position when the pad electrode is formed to cover the conductive film with the third insulating film.


REFERENCES:
patent: 5136354 (1992-08-01), Morita et al.
patent: 5530280 (1996-06-01), White
patent: 5763936 (1998-06-01), Yamaha et al.
patent: 5834829 (1998-11-01), Dinkel et al.
patent: 06 77315 (1994-03-01), None

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