Semiconductor memory with substrate voltage generating circuit f

Details Semiconductor memory with substrate voltage generating circuit f Semiconductor memory with substrate voltage generating circuit f

1991-07-26

1992-09-08

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

3072961, 3072968, 36518909, H03K 501

Patent

active

051461102

ABSTRACT:
A semiconductor memory device having a substrate voltage production circuit comprises a time delay circuit. The time delay circuit of the present invention has a simple construction and is provided to facilitate removal of an unwanted substrate current I.sub.SUB existing during a precharge cycle of memory operation. The substrate voltage production circuit requires no additional regulating signals for operation. Latch-up conditions commonly caused by such unwanted substrate currents are eliminated and stable semiconductor memory device operation is achieved.

REFERENCES:
patent: 4142114 (1979-02-01), Green
patent: 4628214 (1986-12-01), Leuschner
patent: 4820936 (1989-04-01), Veendrick et al.
patent: 5003511 (1991-03-01), Secol et al.
patent: 5021680 (1991-06-01), Zaw Win et al.
patent: 5041739 (1991-08-01), Goto

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