Semiconductor memory with stacked-capacitor cells

Details Semiconductor memory with stacked-capacitor cells Semiconductor memory with stacked-capacitor cells

1993-09-07

1995-11-28

Nelms, David C.

Static information storage and retrieval

Systems using particular element

Capacitors

257301, 257303, 257306, G11C 1124

Patent

active

054714184

ABSTRACT:
A DRAM with improved stacked-capacitor memory cells is provided. In each memory cell, an aluminum wiring line acting as a part of one of word lines is covered with a interlayer insulator film, and on the interlayer insulator film, a storage capacitor is formed. A storage electrode of the capacitor is contacted with a source/drain region of an MOS select transistor through a contact hole in the interlayer insulator film. The wiring line is not required to be formed over the capacitor and as a result, thickness of the storage electrode of the capacitor is not limited by a fabrication condition. Thus, a dielectric such as Ta.sub.2 O.sub.5 with a larger dielectric constant can be employed as the capacitor dielectric, so that the memory cell area can be reduced.

REFERENCES:
patent: 5247196 (1993-09-01), Kimura
T. Kaga et al, "Crown-Shaped Stacked-Capacitor Cell for 1.5-V Operation 64-Mb DRAM's", IEEE Transactions on Electron Devices, vol. 38, No. 2, Feb. 1991, pp. 255-260.

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