Semiconductor memory with oblique folded bit-line arrangement

Details Semiconductor memory with oblique folded bit-line arrangement Semiconductor memory with oblique folded bit-line arrangement

1993-10-22

1995-02-21

Limanek, Robert P.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257773, H01L 2710, H01L 2348

Patent

active

053919017

ABSTRACT:
A plurality of word lines extend linearly and parallel to each other. A reference word line is positioned to divide the word lines into two groups of word lines. A plurality of bit lines are folded on the reference word line symmetrically with respect to the reference word line and spaced at intervals from each other. Each of memory elements comprises a capacitive element and a switching transistor having a source connected to the capacitive element, a drain connected to one of the bit lines, and a gate connected to one of the word lines. The memory elements are disposed in a matrix such that they are spaced across and along the word lines and paired memory elements whose switching transistors have drains connected to the same bit line are positioned symmetrically with respect to the reference word line.

REFERENCES:
patent: Re32236 (1986-08-01), Scheuerlein
patent: 4914502 (1990-04-01), Lebowitz et al.
patent: 5062077 (1991-10-01), Takashima et al.
patent: 5194752 (1993-03-01), Kumagai et al.
patent: 5315542 (1994-05-01), Melzner

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