Static information storage and retrieval – Read/write circuit – Data refresh
Patent
1987-07-21
1988-05-24
Moffitt, James W.
Static information storage and retrieval
Read/write circuit
Data refresh
365230, G11C 800
Patent
active
047470828
ABSTRACT:
A semiconductor memory is provided with automatic refresh means including a timer, a refresh counter and a refresh buffer each formed on a semiconductor chip mounted with an asynchronous memory, for automatically performing a periodic refresh operation on the basis of a basic clock signal which is generated in response to the detection of a logical change in the output of the refresh counter. The automatic refresh counter includes means for performing one of a read operation and a write operation which are based upon a regular address signal asynchronous with the periodic refresh operation, in preference to the periodic refresh operation.
REFERENCES:
patent: 4547867 (1985-10-01), Reese et al.
patent: 4581718 (1986-04-01), Oishi
patent: 4616342 (1986-10-01), Miyamoto
ISSCC Digest of Technical Papers--Feb. 23, 1984, pp. 216, 217 & 341.
Hanamura Shoji
Honjyo Shigeru
Kojima Fumio
Masuhara Toshiaki
Minato Osamu
Hitachi , Ltd.
Hitachi VLSI Eng. Corp.
Moffitt James W.
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