Semiconductor memory utilizing an improved redundant circuitry c

Details Semiconductor memory utilizing an improved redundant circuitry c Semiconductor memory utilizing an improved redundant circuitry c

1982-02-05

1984-09-11

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Bad bit

371 10, G11C 1300

Patent

active

044714726

ABSTRACT:
A redundant semiconductor memory device is arranged in columns of bit cells addressable in bit segments with a plurality of separate, redundant, columns of bit cells, each separate column being capable of electronic placement at any column position within any bit segment of the memory. Specifically, multiplexer is provided at the output buffers of a memory for multiplexing conventional bit segments with spare columns of bit cells, wherein the spare columns are only activated, that is, selected, when a particular column in the conventional bit segment has been identified to be defective.

REFERENCES:
patent: 4228528 (1980-10-01), Cenker et al.
patent: 4310901 (1982-01-01), Harding et al.
R. Sud and K. C. Hardee, "16-K Static RAM Takes New Route to High Speed", Electronics, Sep. 11, 1980, pp. 117-123.
V. G. McKenny, "A 5V 64K EPROM Utilizing Redundant Circuitry", 1980 IEEE International Solid-State Circuits Conference, Feb. 14, 1980, pp. 146-147, 270.

Affiliated with

Also associated with

Rating

Semiconductor memory utilizing an improved redundant circuitry c does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory utilizing an improved redundant circuitry c, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory utilizing an improved redundant circuitry c will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1199033