Semiconductor memory testing apparatus

Static information storage and retrieval – Read/write circuit – Testing

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

365233, 365194, 365236, G11C 2900

Patent

active

056151578

ABSTRACT:
A memory device comprising memory cells associated with word lines for storing data. A timer is connected to determine the length of time during which a selected word line(s) is activated. The word line activation time length is shorter in a testing mode than in a using mode.

REFERENCES:
patent: 5025422 (1991-06-01), Moriwaki et al.
patent: 5079744 (1992-01-01), Tobita et al.
patent: 5400282 (1995-03-01), Suzuki et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Semiconductor memory testing apparatus does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory testing apparatus, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory testing apparatus will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2209612

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.