Semiconductor memory tester with hardware accelerators

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39518301, G01R 3128

Patent

active

057545561

ABSTRACT:
A semiconductor memory manufacturing system including a tester sub-system and a redundancy analysis sub-system. The manufacturing system includes a transfer circuit between the test sub-system and the redundancy analysis sub-system that reduces the number of bits of data transferred to the redundancy analyzer. This speeds up the transfer process and also speeds up the redundancy analysis.

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