Semiconductor memory system for flash memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition

Reexamination Certificate

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Details

C711S156000, C711S170000, C365S185290, C365S185330, C365S218000, C713S001000, C713S100000

Reexamination Certificate

active

07571277

ABSTRACT:
Provided is a semiconductor memory system including a plurality of main memory chips and sub-memory chips as alternatives, in which each main memory chip includes a plurality of reserved memory blocks in the same chip as alternatives to an abnormal memory block. When it is detected that the number of the remaining reserved memory blocks unused as blocks to be reassigned has reached a first predetermined value in the main memory chip, the memory blocks in the sub-memory chip starts to be formatted. When the number of the remaining reserved memory blocks unused in the main memory chip reaches a second predetermined value, read/write with respect to the main memory chip is switched to the sub-memory chip, while bypassing the format process for the memory block in the sub-memory chip. Thus, in the semiconductor memory system including a main flash memory, an alternative flash memory, and a write cache memory, the capacity of a RAM for the write cache memory can be reduced.

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patent: 2000-181805 (2000-06-01), None

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