Semiconductor memory, semiconductor memory system, and error...

Details Semiconductor memory, semiconductor memory system, and error... Semiconductor memory, semiconductor memory system, and error...

2008-05-27

2011-12-13

Chaudry, M. Mujtaba K (Department: 2112)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

C714S800000

Reexamination Certificate

active

08078938

ABSTRACT:
Aspects of the embodiment include providing a semiconductor memory comprising; a plurality of memory blocks that includes a plurality of regular memory cells; a plurality of first parity blocks that are disposed in accordance with the plurality of memory blocks, wherein the plurality of first parity blocks include a first parity memory cell holding a first parity code; a second parity block that includes a second parity memory cell holding a second parity code having a parity bit corresponding to the first parity code; a parity error correction unit that corrects an error of the first parity code using the second parity code; and a data error correction unit that corrects an error of the data stored in a regular memory cell using the first parity code corrected by the parity error correction unit.

REFERENCES:
patent: 5856890 (1999-01-01), Hamai et al.
patent: 7299401 (2007-11-01), Fukuda
patent: 2002/0110071 (2002-08-01), Oki et al.
patent: 2005-216437 (2005-08-01), None

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