Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate
2007-11-30
2010-06-29
Lam, David (Department: 2827)
Static information storage and retrieval
Read/write circuit
Data refresh
C365S230030, C365S233100, C365S189050
Reexamination Certificate
active
07746718
ABSTRACT:
A refresh register stores disable block information indicating a memory block whose refresh operation is to be disabled. A refresh control circuit periodically executes the refresh operation of a memory block except the memory block corresponding to the disable block information. During an access cycle to one of the memory blocks, the register control circuit writes the disable block information to the refresh register according to an external input. Consequently, in order to rewrite the refresh register, it is not necessary to use an additional operation cycle to the access cycle. Since there is no need to insert an extra operation cycle, it is possible to change a memory area to be refreshed without lowering effective efficiency of access cycles. As a result, power consumption can be reduced.
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Eguchi Yasuyuki
Fujioka Shin-ya
Okuyama Yoshiaki
Arent & Fox LLP
Fujitsu Semiconductor Limited
Lam David
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