Semiconductor memory integrated circuit with simplified circuit

Static information storage and retrieval – Read/write circuit – Including signal comparison

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36518902, 36518905, G11C 700

Patent

active

057577048

ABSTRACT:
In a semiconductor memory device, an first address register stores an inputted address and a second address register stores a write address for a write data. A comparing circuit compares both of the stored addresses, and generates a coincidence signal in accordance with the comparing result. A memory cell array composed of a plurality of memory cells. A write data register stores the write data. A data output register selectively receives, one of the write data from the write data register and a read data from the memory cell array as a selected data in response to the control signal and a register clock signal. Then, the data output register outputs the selected data in response to the register clock signal.

REFERENCES:
patent: 5321651 (1994-06-01), Monk
patent: 5404480 (1995-04-01), Suzuki
patent: 5467457 (1995-11-01), Kohda et al.
patent: 5717653 (1998-02-01), Suzuki

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