Semiconductor memory integrated circuit

Details Semiconductor memory integrated circuit Semiconductor memory integrated circuit

1999-02-01

1999-08-24

Phan, Trong

Static information storage and retrieval

Read/write circuit

Flip-flop used for sensing

365207, 365208, 365149, G11C 700, G11C 1124

Patent

active

059432799

ABSTRACT:
There is provided a semiconductor memory integrated circuit which is formed through high-density integration of memory cells and sense circuits and which is capable of ensuring stable operations even in conjunction with a further reduction in voltage and a further increase in the operating speed of the circuit. Two-transistor memory cells, each of which includes a pair of access transistors and a memory capacitor, are arranged in a matrix pattern. A bit line is shared between adjacent columns of memory cells, and a sense circuit is also shared between adjacent columns of memory cells. The sense circuit includes a first sense circuit formed from n-channel MOS transistors, and a second sense circuit formed from p-channel MOS transistors. After a potential difference between signals of the pair of bit lines is amplified to a certain extent by means of the first sense circuit, the second sense circuit is activated to amplify the signal potential difference to a much greater extent.

REFERENCES:
patent: 5293563 (1994-03-01), Ohta
patent: 5329479 (1994-07-01), Ota et al.
patent: 5574681 (1996-11-01), Foss et al.
patent: 5841717 (1998-11-01), Yamaguchi
patent: 5859794 (1999-01-01), Chan

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