Semiconductor memory including reduced capacitive coupling betwe

Details Semiconductor memory including reduced capacitive coupling betwe Semiconductor memory including reduced capacitive coupling betwe

1989-06-27

1992-03-24

Gossage, Glenn

Static information storage and retrieval

Read/write circuit

For complementary information

365206, 365210, 36523005, 365 63, G11C 702, G11C 11407

Patent

active

050994522

ABSTRACT:
A semiconductor memory apparatus comprises a plurality of complementary bit line pairs for accessing memory cells. Each of the memory cells is accessed by two complementary bit line pairs. Each of the complementary bit line pairs is connected to a corresponding sense amp circuit for amplifying a signal level difference between bit lines of a corresponding bit line pair. A plurality of sealed lines, each being connected to ground and being positioned between two adjacent bit lines of different complementary bit line pairs, are provided to avoid the formation of a line-to-line capacitance between the two adjacent bit lines.

REFERENCES:
patent: 4551820 (1985-11-01), Matsuura
patent: 4689770 (1987-08-01), Miyamoto et al.
patent: 4916661 (1990-04-01), Nawaki et al.
patent: 4922459 (1990-05-01), Hidaka

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