Semiconductor memory having a spare memory cell

Details Semiconductor memory having a spare memory cell Semiconductor memory having a spare memory cell

2006-05-02

2006-05-02

Le, Vu A. (Department: 2824)

Static information storage and retrieval

Read/write circuit

Data refresh

C365S200000

Reexamination Certificate

active

07038969

ABSTRACT:
A semiconductor memory encompasses a memory cell array having a spare memory cell array; a holding circuit having banks of fuses, configured to read and hold fuse information; a decision circuit configured to determine which address of memory cell is to be replaced with which spare memory cell based on the fuse information from the holding circuit; and a holding-controller configured to control reading and holding of the fuse information in the holding circuit by receiving a power supply completion signal and a refresh signal. The holding circuit rereads the fuse information when the reread signal is generated, after the holding circuit reads once the fuse information by receiving the power supplying completion signal.

REFERENCES:
patent: 5983367 (1999-11-01), Higuchi et al.
patent: 6366515 (2002-04-01), Hidaka
patent: 6421284 (2002-07-01), Sakata
patent: 6480430 (2002-11-01), Sato
patent: 6501817 (2002-12-01), Parris et al.
patent: 10-69798 (1998-03-01), None

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