Semiconductor memory having a sense amplifier with load transist

Details Semiconductor memory having a sense amplifier with load transist Semiconductor memory having a sense amplifier with load transist

1995-06-06

1997-01-07

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Flip-flop used for sensing

36518521, 327 51, G11C 700

Patent

active

055924271

ABSTRACT:
An object of the present invention is to provide a semiconductor device that permits easy and efficient testing. A nonvolatile semiconductor memory comprises word lines WLi and bit lines BLi, a memory cell matrix 17 consisting of nonvolatile memory cells Cij, a sense amplifier 15, a write/erase timing circuit 9 for performing timing control necessary for write and erase operations, and a status register 2 for storing the operating state of the memory at the completion of the operation of the circuit 9, wherein there are provided, outside the address of the memory cell matrix 17, two kinds of dummy cells, D1, D2, D3, . . . , whose values are fixed to different values that induce different outputs from the sense amplifier 15. A pass condition or a fail condition is generated by accessing the dummy cells.

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