Static information storage and retrieval – Read/write circuit – Including level shift or pull-up circuit
Patent
1999-08-11
2000-12-05
Tran, Andrew Q.
Static information storage and retrieval
Read/write circuit
Including level shift or pull-up circuit
36518909, 365205, 365190, 365228, 36518907, G11C 708
Patent
active
06157581&
ABSTRACT:
According to disclosed embodiments, a semiconductor memory (100) can include a restore voltage control circuit (106) that can supply a first internal voltage V.sub.INT that is lower than an external power supply voltage Vcc, a second internal voltage V.sub.INTS 1 that is lower than the first internal voltage V.sub.INT, and a third internal voltage V.sub.INT 2 equal to or less than the first internal voltage V.sub.INT and greater than the second internal voltage V.sub.INTS 1. The semiconductor memory (100) can further include a p-channel MOS transistor (T108) that can provide a conductive path between a voltage supply path (116) and a sense amplifier (104) in response to a sense signal Se at the first internal voltage V.sub.INT. A switch signal generating circuit (112) can supply a switch signal Sw that can change the potential on the voltage supply path (116) from the second internal voltage V.sub.INTS 1 to the third internal voltage V.sub.INTS 2 while transistor T108 is conductive.
REFERENCES:
patent: 4870620 (1989-09-01), Yamagata et al.
patent: 5128863 (1992-07-01), Nakamura et al.
patent: 5986474 (1999-11-01), Chung et al.
NEC Corporation
Tran Andrew Q.
Walker Darryl G.
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