Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate
2006-04-06
2009-11-24
Hoang, Huan (Department: 2827)
Static information storage and retrieval
Read/write circuit
Bad bit
C365S185090, C365S210100
Reexamination Certificate
active
07623399
ABSTRACT:
A semiconductor memory has a memory unit including a regular cell array having a plurality of memory cells and a decoder for decoding an input address and selecting a memory cell corresponding to the input address in the regular cell array, in which an access operation is performed to the selected memory cell; a defective address storage section which stores a defective address corresponding to a defective bit in the regular cell array; and a replacement address storage section which stores a replacement address corresponding to a replacement bit in the regular cell array. When a supply address supplied to the memory unit matches the defective address, the replacement address, in place of the supply address, is supplied to the memory unit as the input address, according to which the access operation is performed.
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Arent & Fox LLP
Fujitsu Microelectronics Limited
Hoang Huan
Lappas Jason
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