Semiconductor memory devices having separate read and write...

Static information storage and retrieval – Read/write circuit – Differential sensing

Reexamination Certificate

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C365S189040

Reexamination Certificate

active

11186691

ABSTRACT:
Semiconductor memory devices include a memory cell array region having a plurality of memory cells, a local data I/O line pair that is electrically connected to the plurality of memory cells, a local sense amplifier that is electrically connected to the local data I/O line pair, a read global data I/O line pair that is electrically connected to the local sense amplifier and that is configured to transmit data during a read operation and a write global data I/O line pair that is electrically connected to the local sense amplifier that is configured to transmit data during a write operation.

REFERENCES:
patent: 6272056 (2001-08-01), Ooishi
patent: 6396732 (2002-05-01), Osada et al.
patent: 6956780 (2005-10-01), Kyung
patent: 11-328965 (1999-11-01), None
patent: 2001-202782 (2001-07-01), None
patent: 2003-085996 (2003-03-01), None
patent: 2003-249097 (2003-09-01), None
patent: 1019990063603 (2001-07-01), None

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