Static information storage and retrieval – Read/write circuit – Data refresh
Patent
1986-10-28
1988-09-06
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Data refresh
365203, 365204, G11C 1140, G11C 1300
Patent
active
047697920
ABSTRACT:
Two or more voltage bootstrap circuits are included, and are sequentially operated. A continuous data write/read operation can be performed at a high speed. One of the two voltage bootstrap circuits is used for the data write/read operation and the other thereof is used for the refresh operation, thereby shortening the time required for refreshing.
REFERENCES:
Nakano et al., "A Sub-100 ns 256 K Dram with Open Bit Line Scheme," IEEE-JSSC, vol. SC 18, No. 5, pp. 452-456, Oct. 1983.
Fujii Syuso
Nogami Kazutaka
Sakurai Takayasu
Fears Terrell W.
Kabushiki Kaisha Toshiba
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