Semiconductor memory device with switching for redundant cells

Details Semiconductor memory device with switching for redundant cells Semiconductor memory device with switching for redundant cells

1984-12-17

1987-04-21

Moffitt, James W.

Static information storage and retrieval

Read/write circuit

Bad bit

G11C 700

Patent

active

046601791

ABSTRACT:
A organization for multi-bit output includes a plurality of memory cell groups and a plurality of data buses, each of which belongs to each of the groups, wherein one of memory cells in each memory cell groups are selected at the same time. A semiconductor memory device includes a plurality of groups of redundant cells one of which can replace a group of memory cells which comprise a defective memory cell, and switching circuits which selectively connect one of the groups of the redundant cells to the data bus belonging to one of the groups of memory cells. The switching circuit can connect the one of groups of the redundant cells to one of the data buses belonging to any of the cell groups.

REFERENCES:
patent: 4346459 (1982-08-01), Sud et al.

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