Semiconductor memory device with signal aligning circuit

Details Semiconductor memory device with signal aligning circuit Semiconductor memory device with signal aligning circuit

2009-05-26

2011-11-08

Sofocleous, Alexander (Department: 2824)

Static information storage and retrieval

Read/write circuit

Signals

C365S191000, C365S230080

Reexamination Certificate

active

08054702

ABSTRACT:
A signal aligning circuit includes a plurality of pads receiving input signals in parallel 1 bit by 1 bit; a first transferring unit for transferring the input signals as first signals in synchronization with a first clock signal of an internal clock, and transferring the input signals as second signals in synchronization with a second clock signal of the internal clock; a second transferring unit for transferring the first signals in synchronization with the second clock signal of the internal clock; and an aligning unit for aligning the first and second signals transferred from the first and second transferring units and outputting the aligned signal as output signals.

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