Semiconductor memory device with sense amplifiers

Static information storage and retrieval – Read/write circuit – Flip-flop used for sensing

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365207, 365149, G11C 700

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active

047485965

ABSTRACT:
In a dynamic semiconductor memory, bit line pairs and word lines are perpendicular to each other and arranged in a matrix constituted by memory cells. Dummy cells are arranged at intersections between the bit line pairs and a pair of dummy cell word lines. The capacitance of each dummy cell is half that of the memory cell. A pre-sense amplifier and a main sense amplifier are arranged in each pair of bit lines. When data is read out from a selected memory cell, the pre-sense amplifiers are simultaneously activated to perform the pre-sensing operation. However, in the main sensing operation, only one specific main sense amplifier arranged in a certain bit line pair including the bit line connected to the selected memory cell is activated.

REFERENCES:
patent: 4298867 (1981-11-01), Craig
patent: 4331955 (1982-05-01), Hansen
patent: 4386349 (1983-05-01), Granberg et al.
patent: 4491858 (1985-01-01), Kawamoto
patent: 4506351 (1985-03-01), Scheuerlein et al.
J. M. Lee, J. R. Breivogel, R. Kunita, C. Webb, ISSCC 79 Digest of Technical Papers, pp. 142-143; 1979.

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