Semiconductor memory device with row selection control circuit

Details Semiconductor memory device with row selection control circuit Semiconductor memory device with row selection control circuit

2005-06-21

2005-06-21

Yoha, Connie C. (Department: 2827)

Static information storage and retrieval

Read/write circuit

Data refresh

C365S233100, C365S230030, C365S230080, C365S233500

Reexamination Certificate

active

06909658

ABSTRACT:
A self refresh timer is set constantly to an operation state to render a refresh request signal FAY active periodically. When contention occurs between the refresh request signal FAY and an externally applied read or write command, a row selection related circuit/command generation related circuit controls a row related control signal so that a refresh operation is carried out after, for example, the read or write operation ends. A submemory array SMA is divided more small than that of the conventional case, and the refresh cycle ends in a shorter period of time. Therefore, a read operation and a refresh operation can be completed within a read cycle time. A DRAM core that can be employed with control as simple as that of an SRAM can be realized.

REFERENCES:
patent: 4716551 (1987-12-01), Inagaki
patent: 5493538 (1996-02-01), Bergman
patent: 5600605 (1997-02-01), Schaefer
patent: 5862093 (1999-01-01), Sakakibara
patent: 6219292 (2001-04-01), Jang
patent: 6438055 (2002-08-01), Taguchi et al.
“A 90-MHz 16-Mb System Integrated Memory with Direct Interface to CPU,” by Dosaka et al., IEICE Trans. Electron., vol. E79-C, No. 7 (Jul. 1996), pp. 948-955.
IEICE Trans. Electron., vo. E79-C, No. 7 (Jul. 1996), pp. 948-955.
“A 4-MB Psuedo SRAM Operating at 2.6±1V with 3-μA Data Retention Current,” by Sato et al., IEEE Journal of Solid-State Circuits, vol. 26, No. 11 (Nov. 1991), pp. 1556-1561.

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