Semiconductor memory device with refresh trigger

Details Semiconductor memory device with refresh trigger Semiconductor memory device with refresh trigger

2007-08-27

2009-10-27

Phung, Anh (Department: 2824)

Static information storage and retrieval

Read/write circuit

Data refresh

C365S185250

Reexamination Certificate

active

07609576

ABSTRACT:
A semiconductor memory device includes a memory cell array including a plurality of memory cell transistors, an X decoder designating a position of an X axis of the memory cell, a Y decoder designating a position of a Y axis crossing the X axis, a controller collectively controlling operations of read, write and erase of the memory cell transistors via the X decoder and the Y decoder, a semiconductor time switch generating an output signal after a predetermined life time elapses without a power source, and a refresh trigger circuit receiving the output signal from the semiconductor time switch, and giving the controller instructions to transfer information stored in one area of the memory cell array to other area thereof to refresh the information.

REFERENCES:
patent: 6614704 (2003-09-01), Dobler et al.
patent: 7075284 (2006-07-01), Watanabe et al.
patent: 7324399 (2008-01-01), Jang et al.
patent: 7336557 (2008-02-01), Sawada
patent: 2008/0074180 (2008-03-01), Watanabe et al.
patent: 10-150171 (1998-06-01), None
patent: 2000-251483 (2000-09-01), None
patent: 2005-141827 (2005-06-01), None
patent: 2006-310662 (2006-11-01), None

Affiliated with

Also associated with

Rating

Semiconductor memory device with refresh trigger does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device with refresh trigger, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device with refresh trigger will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4085303