Semiconductor memory device with redundancy switching method

Details Semiconductor memory device with redundancy switching method Semiconductor memory device with redundancy switching method

1997-08-28

1998-11-24

Mai, Son

Static information storage and retrieval

Read/write circuit

Bad bit

365201, 36518907, G11C 700, G11C 2900

Patent

active

058417117

ABSTRACT:
A semiconductor memory device with a redundancy switching system is operable in first and second modes. In the first mode, data read from a memory element is compared with external data, and if the compared data do not agree with each other, an external address is latched. In the second mode, the latched external address is written into a redundancy switching nonvolatile memory element. The first and second modes are selected with the same signal for each memory chip.

REFERENCES:
patent: 5469444 (1995-11-01), Endoh et al.
patent: 5566113 (1996-10-01), Saito et al.
patent: 5642317 (1997-06-01), Furutani

Affiliated with

Also associated with

Rating

Semiconductor memory device with redundancy switching method does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device with redundancy switching method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device with redundancy switching method will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1710688