Semiconductor memory device with reduced soft error rate...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S350000, C257S351000, C257S357000, C257S371000, C438S514000, C438S527000, C438S532000

Reexamination Certificate

active

10967027

ABSTRACT:
The present invention provides a semiconductor memory device with reduced soft error rate (SER) and a method for fabricating such a device. The semiconductor memory device includes a plurality of implants of impurity ions that provide for a reduced number of minority carriers having less mobility. A fabrication process for the semiconductor memory includes a “non-retrograde” implant of impurity ions that is effective to suppress the mobility and lifetime of minority carriers in the devices, and a “retrograde” implant of impurity ions that is effective to substantially increase the doping concentration at the well bottom to slow down or eliminate additional minority carriers.

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Larry D. Edmonds, “Electric Currents Through Ion Tracks in Silicon Devices”, IEEE Transactions on Nuclear Science, Dec. 1998, vol. 45, No. 6, pp. 3153-3164.
R. M. Warner, Jr. and B. L. Grung, “Transistors: Fundamentals for the Integrated—Circuit Engineer”, 1983, p. 195.

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