Semiconductor memory device with reduced power consumption

Details Semiconductor memory device with reduced power consumption Semiconductor memory device with reduced power consumption

2008-07-02

2010-11-02

Fahmy, Wael M (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S261000, C257S296000, C257SE21018, C257SE21210

Reexamination Certificate

active

07825456

ABSTRACT:
A nonvolatile semiconductor memory device and a method for manufacturing the same that may include forming an isolation pattern in a substrate, and then etching a portion of the isolation pattern to expose a portion of an active region of the substrate, and then forming high-density second-type ion implantation regions spaced apart at both edges of the active region by performing a tilted ion implantation process, and then forming a high-density first-type ion implantation region as a bit line in the active region, and then forming an insulating layer on the substrate including the high-density first-type ion implantation region, the high-density second-type ion implantation regions and the isolation pattern, and then forming a metal interconnection as a word line on the insulating layer pattern and extending in a direction perpendicular to bit line.

REFERENCES:
patent: 6525403 (2003-02-01), Inaba et al.
patent: 6649959 (2003-11-01), Hsu et al.
patent: 7511358 (2009-03-01), Choi et al.
patent: 2003/0080356 (2003-05-01), Miida
patent: 2003/0209767 (2003-11-01), Takahashi et al.
patent: 15-078048 (2003-03-01), None

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