Semiconductor memory device with rapid sense amplification

Details Semiconductor memory device with rapid sense amplification Semiconductor memory device with rapid sense amplification

1991-03-13

1993-09-14

Pascal, Robert J.

Static information storage and retrieval

Read/write circuit

Differential sensing

365208, 307530, G11C 1134

Patent

active

052455815

ABSTRACT:
In each of the sense amplifiers of a DRAM, the common source terminal of pull-down transistors which are connected to a bit line pair is connected to a discharge line through first and second current paths. One end of the discharge line is grounded. The first and second current paths are provided with first and second switches, respectively. The first and second switches are independently controlled by a different signal. The first current path is further provided with a third switch. The third switch is turned on when the potentials of both of the bit lines are greater than a threshold, and turned off when one of the potentials is not greater than the threshold.

REFERENCES:
patent: 4791616 (1988-12-01), Taguchi et al.
patent: 4926381 (1990-05-01), Fujii
patent: 5111434 (1992-05-01), Cho
M. Koyanagi, Submicron Device I, pp. 68-69 with English abstract, Jul. 31, 1987.

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