Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1991-02-07
1994-05-24
Sikes, William L.
Static information storage and retrieval
Read/write circuit
Bad bit
365203, 3652257, 307219, G11C 2900
Patent
active
053155513
ABSTRACT:
A semiconductor memory device having a redundant circuit for electrically replacing a defective memory cell column with a spare memory cell column. An electric fuse (25) is connected between a precharging voltage line (V.sub.BL) and bit lines (BL, BL). When a defective memory cell exists, the precharging voltage tries to vary through this fuse. However, this fuse is cut off, so that the precharging voltage is prevented from varying. Accordingly, data stored in the remaining memory cells are read out correctly and without delay.
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Cunningham Terry D.
Mitsubishi Denki & Kabushiki Kaisha
Sikes William L.
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