Semiconductor memory device with pre-sense circuits and a...

Details Semiconductor memory device with pre-sense circuits and a... Semiconductor memory device with pre-sense circuits and a...

2006-07-04

2006-07-04

Lam, David (Department: 2827)

Static information storage and retrieval

Read/write circuit

Differential sensing

C365S205000, C365S210130

Reexamination Certificate

active

07072236

ABSTRACT:
A reading circuit of a memory cell includes multiple reference cells each having at least one of multiple possible states of the memory cell, a first pre-sense circuit for supplying current to the memory cell and outputting a first output voltage according to a storage state of the memory cell, a plurality of second pre-sense circuits for supplying currents to the multiple reference cells and outputting second output voltages according to storage states of the reference cells, and a sense amplifier. The sense amplifier is constructed so that one of differential input stages of a differential amplifier is divided in parallel into the same number of pieces as that of the reference cells, the second output voltages of the plurality of second pre-sense circuits are supplied to the divided inputs, and the first output voltage of the first pre-sense circuit is supplied to the other differential input stage.

REFERENCES:
patent: 6324112 (2001-11-01), Fournel
patent: 62-008398 (1987-01-01), None
patent: 2-285593 (1990-11-01), None

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