Semiconductor memory device with partial refresh function

Details Semiconductor memory device with partial refresh function Semiconductor memory device with partial refresh function

2007-08-23

2009-06-09

Phung, Anh (Department: 2824)

Static information storage and retrieval

Read/write circuit

Data refresh

26

Reexamination Certificate

active

07545699

ABSTRACT:
A semiconductor memory device includes a timing signal circuit to generate a refresh timing signal comprised of a series of pulses, a refresh address circuit to generate a refresh address in synchronization with each pulse of the refresh timing signal, a pulse selecting circuit to assert a refresh request signal in synchronization with pulses selected from the series of pulses, and a memory core to receive the refresh address and the refresh request signal and to perform a refresh operation with respect to the refresh address in response to assertion of the refresh request signal, wherein arrangement is made to switch between a first operation mode in which the selected pulses are obtained by selecting one pulse out of every predetermined number of pulses from the series of pulses and a second operation mode in which the selected pulses are obtained by selecting consecutive pulses from the series of pulses.

REFERENCES:
patent: 5890198 (1999-03-01), Pawlowski
patent: 6903990 (2005-06-01), Mizugaki
patent: 6917553 (2005-07-01), Mizugaki et al.
patent: 7006401 (2006-02-01), Takahashi et al.
patent: 2004-227624 (2004-08-01), None
patent: WO 2004/070729 (2004-08-01), None

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