Semiconductor memory device with on-die termination circuit

Electronic digital logic circuitry – Interface – Current driving

Reexamination Certificate

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Details

C326S030000, C326S083000

Reexamination Certificate

active

11070367

ABSTRACT:
An on-die termination circuit with a stable effective termination resistance value and stabilized impedance mismatching. The on-die termination circuit includes: a decoding unit for decoding set values of an extended mode register set; an ODT output driver block including a plurality of output driver units connected in parallel with an output node for outputting an output signal and assigned with different resistance values; and a control signal generation block for generating a plurality of pull up and pull down control signals for turning on/off the plurality of output driver units in response to output signals of the decoding unit.

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Korean Office Action with English translation for KR Patent Application No. 2004-87875, Feb. 17, 2006.

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