Semiconductor memory device with low power consumption output da

Static information storage and retrieval – Read/write circuit – Including specified plural element logic arrangement

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Details

36518901, 365227, G11C 1300

Patent

active

052087743

ABSTRACT:
A static random access memory device has read-out bit lines for propagating read-out data bits to a selector circuit, and logic gates are coupled between the read-out bit lines and the selector circuit for inverting the data bits, wherein through current tends to flow through the logic gates due to decayed voltage levels on the read-out bit lines; however, only one of the logic gate coupled with a transfer transistor selected by a column address decoder is enabled so as to decrease the amount of the through current.

REFERENCES:
patent: 4953127 (1990-08-01), Nagahashi et al.

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